DocumentCode
1855689
Title
Wafer level packaging of MEMS
Author
Esashi, M.
Author_Institution
Tohoku Univ., Sendai, Japan
fYear
2009
fDate
21-25 June 2009
Firstpage
9
Lastpage
16
Abstract
Wafer level packaging methods of MEMS are described. These play important roles to reduce cost and to improve reliability. MEMS structures on silicon chips are encapsulated with bonded caps or with shells fabricated by surface micromachining, and electrical interconnections are made from the cavity. Vacuum packaging methods are also described.
Keywords
integrated circuit interconnections; integrated circuit reliability; micromachining; micromechanical devices; wafer level packaging; MEMS; circuit reliability; electrical interconnection; silicon chip; surface micromachining; vacuum packaging method; wafer level packaging method; Capacitive sensors; Circuits; Costs; Etching; Glass; Micromechanical devices; Packaging machines; Silicon; Wafer bonding; Wafer scale integration; MEMS; Wafer level packaging; bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Sensors, Actuators and Microsystems Conference, 2009. TRANSDUCERS 2009. International
Conference_Location
Denver, CO
Print_ISBN
978-1-4244-4190-7
Electronic_ISBN
978-1-4244-4193-8
Type
conf
DOI
10.1109/SENSOR.2009.5285574
Filename
5285574
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