DocumentCode :
1855825
Title :
A 5 mW time-to-digital converter based on a stabilized CMOS delay line
Author :
Raisanen-Ruotsalainen, Elvi ; Rahkonen, Timo ; Kostamovaara, J.
Author_Institution :
Dept. of Electr. Eng., Oulu Univ., Finland
Volume :
1
fYear :
1995
fDate :
13-16 Aug 1995
Firstpage :
393
Abstract :
A low-power, compact time-to-digital converter has been integrated in a 1.2 μm CMOS technology. The circuit has a 15 ns time measurement resolution over a range of 120 ns. A single delay line is used for transient capture to detect multiple stop marks for each start mark of the time interval. The nominal value of the delays is set by a phase-locked loop. The measured accuracy is better than ±2 ns in a working temperature range of -40-+60°C and with a supply voltage of 5±0.5 V. Current consumption from the 5 V supply is 0.7 mA and the size of the circuit is 1.7 mm×2.3 mm
Keywords :
CMOS integrated circuits; analogue-digital conversion; delay lines; signal processing equipment; time measurement; -40 to 60 C; 0.7 mA; 1.2 micron; 120 ns; 15 ns; 5 V; 5 mW; TDC; low-power operation; ns time measurement resolution; phase-locked loop; stabilized CMOS delay line; time-to-digital converter; CMOS technology; Circuits; Clocks; Current measurement; Delay lines; Integrated circuit technology; Laser radar; Optical pulses; Phase locked loops; Pulse measurements; Size measurement; Temperature distribution; Time measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
Type :
conf
DOI :
10.1109/MWSCAS.1995.504459
Filename :
504459
Link To Document :
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