Efficient function-block implementation of self-timed circuits

A new universal gate is presented for the self-timed design discipline of quasi-delay insensitivity with dual-rail encoding and four-phase handshaking. The gate is particularly simple, comprising only the conventional NAND and NOR gates, and is supported by an equally simple development method involving a novel forward-signaling pipeline. The gate satisfies Seitz´s weak condition and is universal in the sense that any basic operation can be implemented using it. The development method is reported to compare favourably with analogous methods and is demonstrated here on a selection of 32-bit adders.