Title :
Heuristics for Mapping Parallel Computations to Parallel Architectures
Author :
Tao, L. ; Narahari, B. ; Zhao, Y.C.
Author_Institution :
Dept. of EE & CS, George Washington University
Keywords :
Computational efficiency; Computer architecture; Concurrent computing; Costs; Interference; NP-hard problem; Parallel architectures; Parallel processing; Probes; Stochastic processes;
Conference_Titel :
Heterogeneous Processing, 1993. WHP 93. Proceedings. Workshop on
Print_ISBN :
0-8186-3532-0
DOI :
10.1109/WHP.1993.664363