Title :
Total Jitter Measurement for Testing HSIO Integrated SoCs
Author :
Yamaguchi, Takahiro J. ; Ishida, Masahiro
Author_Institution :
Advantest Labs. Ltd., Sendai
Abstract :
Total jitter measurement has been ready to perform jitter testing of HSIO integrated SoCs in an HV production testing environment. Since it requires no special loadboard nor additional hardware or instrumentation, it provides a cost-effective total jitter test solution for HV production testing.
Keywords :
high-speed integrated circuits; integrated circuit measurement; integrated circuit testing; jitter; system-on-chip; HSIO integrated SoC testing; HV production testing; high-speed serial I/O devices; total jitter measurement; Bit error rate; Counting circuits; Gaussian distribution; Hardware; Histograms; Instruments; Performance evaluation; Signal processing algorithms; Testing; Timing jitter; BER; digital-pin; jitter histogram; jitter separation; serial I/O device; total jitter;
Conference_Titel :
Asian Test Symposium, 2008. ATS '08. 17th
Conference_Location :
Sapporo
Print_ISBN :
978-0-7695-3396-4
DOI :
10.1109/ATS.2008.38
