• DocumentCode
    1857685
  • Title

    Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency

  • Author

    Kobayashi, Masaharu ; Hiramoto, Toshiro

  • Author_Institution
    Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2015
  • fDate
    16-18 June 2015
  • Abstract
    We have shown a practical device design guideline for sub-0.2V ultra-low power, steep slope ferroelectric FET using negative capacitance (NC) focusing on operation speed, material requirement, and energy efficiency for the first time. The operation speed is determined by finite switching time of ferroelectric polarization. For low supply voltage and hysteresis-free design, there exists a ferroelectric material parameter window to maximize the benefit of steep slope by NC. By the optimized device design, the energy efficiency is improved by 2.5x. The minimum energy voltage is pushed down to sub-0.2V range.
  • Keywords
    ferroelectric materials; field effect transistors; low-power electronics; polarisation; ferroelectric material parameter window; ferroelectric polarization; finite switching time; negative capacitance; steep slope ferroelectric FET; Energy efficiency; Hafnium compounds; Hysteresis; MOSFET; Mathematical model; Switches; FeFET; Negative capacitance; ferroelectric;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSI Technology), 2015 Symposium on
  • Conference_Location
    Kyoto
  • ISSN
    0743-1562
  • Type

    conf

  • DOI
    10.1109/VLSIT.2015.7223678
  • Filename
    7223678