DocumentCode :
1857710
Title :
System Level LBIST Implementation
Author :
Zhuang, Fei ; Jia, Junbo ; Li, Xiangfeng
Author_Institution :
Cisco Syst., Inc.
fYear :
2008
fDate :
24-27 Nov. 2008
Firstpage :
263
Lastpage :
263
Abstract :
In industry, chips become more and more complicated as advancing in deep submicron silicon process technology. LBIST can cover some newly emerging faults missed by traditional ATPG. That´s why LBIST is becoming more and more popular. Besides launching LBIST through TAP interface, CPU launch LBIST feature may provide more flexibility for system-level or product testing and debugging. System engineer can easily kick-off LBIST with CPU interface instead of TAP.
Keywords :
built-in self test; fault diagnosis; logic testing; microprocessor chips; CPU interface; TAP interface; deep submicron silicon process technology; product debugging; product testing; system level LBIST implementation; system-level testing; Built-in self-test; Centralized control; Circuit testing; Clocks; Energy consumption; Logic testing; Routing; Silicon; System testing; Vehicle crash testing; LBIST; Low power; X-source isolation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2008. ATS '08. 17th
Conference_Location :
Sapporo
ISSN :
1081-7735
Print_ISBN :
978-0-7695-3396-4
Type :
conf
DOI :
10.1109/ATS.2008.81
Filename :
4711594
Link To Document :
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