Title :
30-nm-channel-length c-axis aligned crystalline In-Ga-Zn-O transistors with low off-state leakage current and steep subthreshold characteristics
Author :
Matsuda, S. ; Hiramatsu, T. ; Honda, R. ; Matsubayashi, D. ; Tomisu, H. ; Kobayashi, Y. ; Tochibayashi, K. ; Hodo, R. ; Fujiki, H. ; Yamamoto, Y. ; Tsubuku, M. ; Okazaki, Y. ; Yamamoto, Y. ; Yamazaki, S.
Author_Institution :
Semiconductor Energy Laboratory Co., Ltd. 398 Hase, Atsugi-shi, Kanagawa, 243-0036, Japan
Abstract :
We report the world´s smallest field effect transistors (FETs) with channel lengths of 32 nm including c-axis aligned crystalline (CAAC) In-Ga-Zn-O as their active layers, which achieve low off-state leakage currents. Furthermore, these FETs exhibit excellent subthreshold swing values despite having thick gate insulating film. The FET operation has been achieved owing to the 3D gate structure with a thin active layer, due to the FETs being accumulation-type FETs with intrinsic channels, and due to the dielectric anisotropy of the CAAC crystal structure.
Keywords :
Buffer layers; Dielectrics; Electrodes; Field effect transistors; Leakage currents; Logic gates;
Conference_Titel :
VLSI Technology (VLSI Technology), 2015 Symposium on
Conference_Location :
Kyoto, Japan
DOI :
10.1109/VLSIT.2015.7223680
