Wafer-scale integration as a technology choice for high speed ATM switching systems

This paper presents a new architecture of multigigabit ATM switching system using wafer-scale integration (WSI). Clearly, the crucial delay constraints in a switching network using discrete VLSI components fall within the off-chip interconnections. We propose the use of WSI to facilitate higher speed operation. WSI allows us to consider new design alternatives that would not be practical in a system using discrete components. In the architecture presented in this paper, identical units called self-driven crosspoints will make up the entire ATM switching fabric in a wafer-scale system