Author :
Witters, L. ; Mitard, J. ; Loo, R. ; Demuynck, S. ; Chew, S.A. ; Schram, T. ; Tao, Z. ; Hikavyy, A. ; Sun, J.W. ; Milenin, A.P. ; Mertens, H. ; Vrancken, C. ; Favia, P. ; Schaekers, M. ; Bender, H. ; Horiguchi, N. ; Langer, R. ; Barla, K. ; Mocuta, D. ; C
Abstract :
Strained Ge p-channel FinFETs on Strain Relaxed SiGe are integrated for the first time on high density 45nm Fin pitch using a replacement channel approach on Si substrate. In comparison to our previous work on isolated sGe FinFETs [1], 14/16nm technology node compatible modules such as replacement metal gate and germanide-free local interconnect were implemented. The ION/IOFF benchmark shows the high density strained Ge p-FinFETs in this work outperform the best published isolated strained Ge on SiGe devices.
Keywords :
Ge-Si alloys; MOSFET; integrated circuit interconnections; semiconductor quantum wells; Si substrate; SiGe; germanide-free local interconnect; high density 45nm Fin pitch; replacement channel approach; replacement metal gate; size 14 nm; size 16 nm; size 45 nm; strain relaxed SiGe; strained Ge p-channel FinFET; FinFETs; Logic gates; Silicon; Silicon germanium; Strain; Tin;
