Design and characterization of a stochastic-flash ADC

Author

Caciotta, Maurizio ; Carbone, Paolo ; Cencelli, Valentino Orsolini

Author_Institution

Dipt. di Elettronica, Univ. degli Studi Rome Tre, Italy

Volume

1

fYear

1998

fDate

18-21 May 1998

Firstpage

92

Abstract

In this paper, the design and characterization of a 7-bit CMOS stochastic-flash analog-to-digital converter is illustrated by means of simulations including level-3 CMOS models and estimated dither-based spectra. The conversion scheme and its main properties are briefly recalled, and a possible design of the voltage reference generator proposed. It is shown that mismatches among the resistors in the ladder employed to generate these voltages are largely compensated by the presented architecture when small-scale dithering is employed

Keywords

CMOS integrated circuits; analogue-digital conversion; reference circuits; 7 bit; CMOS ADC; analog-to-digital converter; characterization; conversion scheme; dither-based spectra; ladder resistors; level-3 CMOS models; mismatches compensation; small-scale dithering; stochastic-flash ADC; voltage reference generator design; Analog-digital conversion; Communication equipment; Dynamic voltage scaling; Explosions; Gain measurement; Instruments; Quantization; Resistors; Semiconductor device modeling; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 1998. IMTC/98. Conference Proceedings. IEEE

Conference_Location

St. Paul, MN

ISSN

1091-5281

Print_ISBN

0-7803-4797-8

Type

conf

DOI

10.1109/IMTC.1998.679720

Filename

679720