Parallel filtering and thresholding of images on the SIMD DSP-RAM architecture

DSP-RAM is a moderately-parallel, single-chip SIMD (single instruction stream, multiple data stream) architecture that has been proposed as a suitable hardware platform for accelerating signal processing applications. Our goal is to evaluate the potential of DSP-RAM as a coprocessor for important low-level graphical operations such as convolution filtering and thresholding. Insights gained during the initial implementation prompted a minor improvement to the original design. The benchmark operations were microcoded for DSP-RAM and then simulated on an architectural simulator written in C++. The simulation results were compared to the measured execution times for the corresponding Intel integrated performance primitives functions running on a conventional 1 GHz Pentium III personal computer A modest 25 MHz DSP-RAM coprocessor was found to give equivalent or superior performance for mid to large-sized image frames.