Measurement of thermal and packaging limitations in LDMOSFETs for RFIC applications

RF transistors play an important role in present day wireless applications. Output power levels of about 120 W are required for use of these transistors in cellular base stations. This corresponds to large amount of heating in the devices. It is extremely important to measure the effects of self heating and temperature rise on the device performance. Also, optimum packages have to be designed which can dissipate the heat generated in the devices due to self heating. This paper presents an overview of the measurement techniques used to account for the thermal and packaging limitations on the RF LDMOS transistors. It also discusses methods for efficient modeling of the RF power transistors to include the package parasitics and self heating effects. A simple sub circuit model for the RF LDMOSFET has been described, which has been developed based on the understanding of the device physics obtained from extensive 2D simulations using advanced device and circuit simulators