DocumentCode
1859608
Title
Design of embedded constant weight code checkers based on averaging operations
Author
Tarnick, Steffen
Author_Institution
FBE-ASIC GmbH, Berlin, Germany
fYear
2010
fDate
5-7 July 2010
Firstpage
255
Lastpage
260
Abstract
This paper presents a novel method of designing embedded checkers for constant weight codes. The design method is based on an operation that maps a binary vector to a vector of half length and half weight. Applied to words of constant weight codes this operation preserves essential properties of these words. The checkers designed with this method have a much smaller size than previously proposed embedded checkers for constant weight codes and sometimes they are even smaller than some of the non-embedded checkers that are designed using a particular method from the literature.
Keywords
circuit testing; design; error detection codes; averaging operations; binary vector; design method; embedded constant weight code checkers; Adders; Built-in self-test; Circuit faults; Design methodology; Hardware; Logic gates; Radiation detectors;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2010 IEEE 16th International
Conference_Location
Corfu
Print_ISBN
978-1-4244-7724-1
Type
conf
DOI
10.1109/IOLTS.2010.5560193
Filename
5560193
Link To Document