DocumentCode :
1859896
Title :
Supporting a wide variety of communication protocols using partial dynamic reconfiguration
Author :
Dunkley, Richard
Author_Institution :
309th Software Maintenance Group, Common Aircraft Portable Reprogramming Equip., Hill AFB, UT, USA
fYear :
2012
fDate :
10-13 Sept. 2012
Firstpage :
120
Lastpage :
125
Abstract :
Supporting a variety of communication protocols for test support equipment has typically required extensive hardware and Input/Output (I/O) interfaces targeting each protocol specifically. Recent advanced designs in the past ten years have created more dynamic approaches by using Field Programmable Gate Arrays (FPGAs) and embedded hardware to implement or simulate previous hardware I/O designs. The dynamic possibilities of FPGAs have recently been expanded with the introduction of Dynamic Partial Reconfiguration (DPR), which allows part of the FPGA to be reconfigured while the rest of the logic remains static. This paper evaluates the advantages and disadvantages of using DPR to interface with various communication protocols in test equipment.
Keywords :
automatic test equipment; embedded systems; field programmable gate arrays; peripheral interfaces; protocols; DPR; FPGA; I/O interfaces; communication protocols; dynamic partial reconfiguration; embedded hardware; field programmable gate arrays; hardware I/O design; hardware interfaces; input-output interfaces; test support equipment; Clocks; Computers; Field programmable gate arrays; Hardware; IP networks; Microprocessors; Protocols; Communication Protocols; Dynamic Partial Reconfiguration; Embedded Design; Field Programmable Gate Array; Test and Evaluation Framework;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON, 2012 IEEE
Conference_Location :
Anaheim, CA
ISSN :
1088-7725
Print_ISBN :
978-1-4673-0698-0
Type :
conf
DOI :
10.1109/AUTEST.2012.6334561
Filename :
6334561
Link To Document :
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