Title :
A method for detecting resistive opens in buses
Author_Institution :
Dept. d´´Eng. Electron., Univ. Politec. de Catalunya, Barcelona, Spain
Abstract :
The method is based on the modification of bus connectivity to force bus oscillation during testing. The oscillation frequency depends on the open resistance and location on the line. Comparison of the frequency with a reference allows the detection and eventual location of the defect. Electrical simulations and preliminary experiments on a test chip show the detection capabilities and the feasibility of the proposed method.
Keywords :
logic circuits; logic testing; microprocessor chips; peripheral interfaces; bus connectivity; buses; electrical simulations; force bus oscillation; open resistance; oscillation frequency; resistive open detection; test chip; Capacitance; Delay; Integrated circuit interconnections; Multiplexing; Oscillators; Resistance; Testing;
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2010 IEEE 16th International
Conference_Location :
Corfu
Print_ISBN :
978-1-4244-7724-1
DOI :
10.1109/IOLTS.2010.5560210
