DocumentCode :
1861207
Title :
A charge-domain auto- and cross-correlation based IR-UWB receiver with power-and area-efficient PLL for 62.5ps step data synchronization in 65nm CMOS
Author :
Liu, Lechang ; Sakurai, Takayasu ; Takamiya, Makoto
Author_Institution :
Univ. of Tokyo, Tokyo, Japan
fYear :
2010
fDate :
16-18 June 2010
Firstpage :
27
Lastpage :
28
Abstract :
A 100Mb/s, 1.71mW DC-960MHz band impulse radio ultra-wideband (IR-UWB) receiver is developed in 1.2V 65nm CMOS. A novel auto- and cross-correlation based synchronization scheme is proposed to achieve 62.5ps step data synchronization with a 2-GHz 8-phase PLL clock generator. The developed UWB receiver with the proposed power- and area-efficient PLL achieves the low energy consumption of 17.1pJ/bit.
Keywords :
CMOS integrated circuits; phase locked loops; radio receivers; ultra wideband communication; CMOS; IR-UWB receiver; PLL clock generator; area-efficient PLL; charge-domain autocorrelation based synchronization; cross-correlation based synchronization; data synchronization; frequency 2 GHz; frequency 960 MHz; impulse radio ultra-wideband receiver; power 1.71 mW; power-efficient PLL; size 65 nm; voltage 1.2 V; Capacitance; Charge pumps; Phase locked loops; Receivers; Synchronization; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-5454-9
Type :
conf
DOI :
10.1109/VLSIC.2010.5560260
Filename :
5560260
Link To Document :
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