DocumentCode :
1861630
Title :
A high order multi-bit σδ modulator for multi-standard wireless receiver
Author :
Zhang, Ling ; Nadig, Vinay ; Ismail, Mohammed
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
Volume :
3
fYear :
2004
fDate :
25-28 July 2004
Abstract :
The next generation of cellular systems increasingly similar to a data communication system. Not only it transfers voice and multimedia data, it is also been integrated with WLAN to access Internet whenever possible. Thus these cellular systems need highly integrated multi-standard receivers. The design of the A/D converter in such receivers is a big challenge. A reconfigurable σδ modulator which is suitable for GSM/WCDMA/WLAN standards, is introduced in this paper. According to the different signal bandwidth and dynamic range (DR) specifications, this σδ modulator is reconfigured to achieve the required dynamic range with less power consumption. The prototype is implemented in TSMC 0.18 μm CMOS process with 1.8 V power supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; cellular radio; circuit simulation; code division multiple access; radio receivers; sigma-delta modulation; wireless LAN; 0.18 micron; 1.8 V; A/D converter design; GSM standards; TSMC CMOS process; WCDMA standards; WLAN standards; cellular systems; data communication system; high order multibit sigma-delta modulator; multistandard wireless receiver; power consumption; Bandwidth; CMOS process; Data communication; Dynamic range; Energy consumption; GSM; Internet; Multiaccess communication; Prototypes; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN :
0-7803-8346-X
Type :
conf
DOI :
10.1109/MWSCAS.2004.1354374
Filename :
1354374
Link To Document :
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