Title :
A 2Tb/s 6×4 mesh network with DVFS and 2.3Tb/s/W router in 45nm CMOS
Author :
Salihundam, Praveen ; Jain, Shailendra ; Jacob, Tiju ; Kumar, Shasi ; Erraguntla, Vasantha ; Hoskote, Yatin ; Vangal, Sriram ; Ruhl, Gregory ; Kundu, Partha ; Borkar, Nitin
Author_Institution :
Intel Labs., Intel Corp., Bangalore, India
Abstract :
A packet-switched 6×4 2D mesh network-on-chip (NoC) on a dedicated voltage and frequency island (VFI) provides 2 Tb/s of bisection bandwidth, and interconnects 48 Pentium™ class IA-32 cores and 4 DDR3 channels. The 1.28 Tb/s router with 16 B, 5.4 mm links achieves high network utilization through 8 virtual channels (VC), early-buffer write and read, route pre-computation and a 1-cycle wrapped wavefront allocator (WWFA) design. The 640 K transistor, 1.17 mm2 router operates at 2 GHz at 1.1 V while dissipating 550 mW. Router energy efficiency scales up to 7.2 Tb/s/W.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; network-on-chip; CMOS; DDR3 channels; DVFS; Pentium™ class IA-32 cores; bit rate 2 Tbit/s; cycle wrapped wavefront allocator design; frequency 2 GHz; frequency island; packet-switched 2D mesh network-on-chip; power 550 mW; size 45 nm; virtual channels; voltage 1.1 V; voltage island; Clocks; Energy efficiency; Frequency modulation; Power measurement; Switches; Tiles;
Conference_Titel :
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-5454-9
DOI :
10.1109/VLSIC.2010.5560277
