2.4GHz 7mW all-digital PVT-variation tolerant True Random Number Generator in 45nm CMOS

Author

Srinivasan, Suresh ; Mathew, Sanu ; Ramanarayanan, Rajaraman ; Sheikh, Farhana ; Anders, Mark ; Kaul, Himanshu ; Erraguntla, Vasantha ; Krishnamurthy, Ram ; Taylor, Greg

Author_Institution

Circuits Res. Labs., Intel Corp., Hillsboro, OR, USA

fYear

2010

fDate

16-18 June 2010

Firstpage

203

Lastpage

204

Abstract

An all-digital True Random Number Generator is fabricated in 45nm CMOS with 2.4Gbps random bit throughput and total power consumption of 7mW. Two-step coarse/fine-grained tuning with a self-calibrating feedback loop enables robust operation in the presence of 20% process variation while providing immunity to run-time voltage and temperature fluctuations. The 100% digital design enables a compact layout occupying 4004μm² with measured entropy of 0.999965, and scalable operation down to 280mV, while passing all NIST RNG tests.

Keywords

CMOS digital integrated circuits; UHF circuits; fluctuations; integrated circuit design; integrated circuit testing; random number generation; CMOS integrated circuit; NIST RNG tests; all-digital PVT-variation tolerant; bit rate 2.4 Gbit/s; coarse/fine-grained tuning; compact layout; digital design; frequency 2.4 GHz; power 7 mW; random bit throughput; random number generator; self-calibrating feedback loop; size 45 nm; temperature fluctuations; voltage fluctuations; Entropy; Inverters; NIST; Noise; Radiation detectors; Thermal noise; Tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits (VLSIC), 2010 IEEE Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-5454-9

Type

conf

DOI

10.1109/VLSIC.2010.5560296

Filename

5560296