DocumentCode
1862638
Title
A 250 mV, 352 µW low-IF quadrature GPS receiver in 130 nm CMOS
Author
Heiberg, Adam ; Brown, Thomas ; Mayaram, Kartikeya ; Fiez, Terri S.
Author_Institution
Azuray Technol., Tualatin, OR, USA
fYear
2010
fDate
16-18 June 2010
Firstpage
135
Lastpage
136
Abstract
A low-IF quadrature GPS receiver consisting of a VCO, mixer and variable gain LNA is implemented in 130 nm CMOS. Consuming 352 μW from a 250 mV supply, it has the lowest supply voltage for an integrated receiver reported to date. The measured noise figure is 7.2 dB with a gain of 42 dB at a 10 MHz IF frequency. At a 1 MHz offset, the VCO phase noise is -112.4 dBc/Hz, resulting in an FoM of 187.4 dBc/Hz.
Keywords
CMOS integrated circuits; Global Positioning System; low noise amplifiers; radio receivers; voltage-controlled oscillators; CMOS; VCO; frequency 1 MHz; frequency 10 MHz; gain 42 dB; low-IF quadrature GPS receiver; mixer; noise figure 7.2 dB; power 352 muW; size 130 nm; variable gain LNA; voltage 250 mV; CMOS integrated circuits; CMOS technology; Gain; Global Positioning System; Radio frequency; Receivers; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-5454-9
Type
conf
DOI
10.1109/VLSIC.2010.5560322
Filename
5560322
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