Title :
Low-cost gate-oxide early-life failure detection in robust systems
Author :
Kim, Young Moon ; Kameda, Yoshio ; Kim, Hyunki ; Mizuno, Masayuki ; Mitra, Subhasish
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., Palo Alto, CA, USA
Abstract :
We present a new low-cost technique for detecting gate-oxide early-life failures (ELF) to overcome reliability challenges in robust systems without requiring expensive concurrent error detection. Our approach is enabled by an on-chip clock control technique, applied during periodic on-line self-test and diagnostics, to detect delay shifts over time before functional failures occur. Using 90 nm test chips, we demonstrate the following key results: 1. A gate-oxide ELF transistor inside a combinational logic circuit results in delay shifts over time before functional failures appear. 2. The delay shifts can be successfully detected during on-line self-test and diagnostics using our on-chip clock control technique.
Keywords :
circuit reliability; circuit testing; delays; failure analysis; logic circuits; combinational logic circuit; concurrent error detection; delay shifts; functional failures; gate-oxide ELF transistor; low-cost gate-oxide early-life failure detection; on-chip clock control; periodic on-line self-test; reliability; robust systems; Clocks; Delay; Geophysical measurement techniques; Ground penetrating radar; Logic gates; Stress; System-on-a-chip;
Conference_Titel :
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-5454-9
DOI :
10.1109/VLSIC.2010.5560326