• DocumentCode
    1862786
  • Title

    TCAD modeling of accumulated damage during time-dependent mixed-mode stress

  • Author

    Raghunathan, Uppili S. ; Chakraborty, Partha S. ; Wier, Bryan ; Cressler, John D. ; Yasuda, Hozumi ; Menz, Philipp

  • Author_Institution
    Sch. of ECE, Georgia Tech, Atlanta, GA, USA
  • fYear
    2013
  • fDate
    Sept. 30 2013-Oct. 3 2013
  • Firstpage
    179
  • Lastpage
    182
  • Abstract
    We study the accumulated degradation of SiGe HBTs under time-dependent mixed-mode stress using a new physics-based TCAD degradation model that simulates hot carrier generation and propagation to oxide interfaces, resulting in trap formation. We calibrate the avalanche generation and also do a multipoint calibration of damage on the I-V output plane to accurately predict the accumulated stress damage for a single device over multiple bias points. Looking at the region of the output plane dominated by trap formation, we show that accumulation of traps can be path-independent as long as trap availability is not limiting. We demonstrate this with good correlation between simulation and measurement.
  • Keywords
    Ge-Si alloys; heterojunction bipolar transistors; semiconductor device models; technology CAD (electronics); HBT; SiGe; TCAD modeling; accumulated damage; avalanche generation; hot carrier generation; multipoint calibration; oxide interfaces; time dependent mixed mode stress; trap formation; Calibration; Current measurement; Degradation; Hot carriers; Mathematical model; Predictive models; Stress; SiGe HBT; avalanche generation; bipolar transistor; degradation; hot carriers; impactionization; mixed-mode stress; reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2013 IEEE
  • Conference_Location
    Bordeaux
  • ISSN
    1088-9299
  • Print_ISBN
    978-1-4799-0126-5
  • Type

    conf

  • DOI
    10.1109/BCTM.2013.6798170
  • Filename
    6798170