DocumentCode :
1866265
Title :
Yield optimization of analog MOS integrated circuits including transistor mismatch
Author :
Hua Su ; Michael, C.
Author_Institution :
The Ohio State University
fYear :
1993
fDate :
3-6 May 1993
Firstpage :
1801
Lastpage :
1804
Keywords :
Algorithm design and analysis; Circuit optimization; Circuit simulation; Design automation; Design optimization; Integrated circuit modeling; Integrated circuit yield; MOS integrated circuits; MOSFETs; Optimization methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3
Type :
conf
Filename :
693020
Link To Document :
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