Test circuits for characterizing power transistors in ZVS and ZCS circuits

Author

Trivedi, M. ; Evazians, R. ; Shenai, K.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Illinois Univ., Chicago, IL, USA

Volume

1

fYear

1998

fDate

18-21 May 1998

Firstpage

515

Abstract

Soft switching topology is becoming popular in several power electronics circuits. Soft switching offers tremendous advantages in terms of power loss and parasitics. It is important to characterize the power semiconductor devices in such conditions for optimized circuit design. This paper presents a flexible test circuit to characterize the performance of power transistors in zero-voltage and zero-current switching conditions

Keywords

circuit optimisation; power transistors; semiconductor device testing; semiconductor switches; switching circuits; ZCS circuits; ZVS circuits; flexible test circuit; optimized circuit design; parasitics; power electronics; power loss; power transistors; soft switching topology; test circuits; zero-current switching; zero-voltage switching; Circuit testing; Circuit topology; Design optimization; Power electronics; Power semiconductor devices; Power semiconductor switches; Power transistors; Switching circuits; Zero current switching; Zero voltage switching;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 1998. IMTC/98. Conference Proceedings. IEEE

Conference_Location

St. Paul, MN

ISSN

1091-5281

Print_ISBN

0-7803-4797-8

Type

conf

DOI

10.1109/IMTC.1998.679841

Filename

679841