Development of thermal neutron SER-resilient high-k/metal gate technology

Author

Jongwoo Park ; Gunrae Kim ; Ming Zhang ; Kyungsik Park ; Miji Lee ; Ilgon Kim ; Jongsun Bae ; Sangwoo Pae ; Jinwoo Choi ; Dongsuk Shin ; Nae-In Lee ; Kee Sup Kim

Author_Institution

Technol. Quality & Reliability, Samsung Electron., Yongin, South Korea

fYear

2014

fDate

1-5 June 2014

Abstract

We report the experimental procedure and data that establishes the correlation between natural boron (B¹⁰) concentration and thermal neutron soft error rate (SER) in an advanced 28nm high-k/metal gate (HK/MG) technology node. Thermal neutron induced singe event upsets (SEU) depend on the concentration of B¹⁰ in the contact process adopted for boosting SRAM performance. However, as technology rapidly evolves in terms of transistor feature size and overall design complexity, B¹⁰ concentration needs to decrease so as to reduce thermal neutron SER risk. Optimization of contact and eSiGe process can provide a technology profile that is robust against thermal and high energy neutron SER.

Keywords

Ge-Si alloys; SRAM chips; boron; high-k dielectric thin films; neutron effects; radiation hardening (electronics); semiconductor materials; thermal analysis; B; HK-MG technology node; SEU; SRAM performance boosting; SiGe; contact optimization; contact process; design complexity; natural boron concentration; size 28 nm; technology profile; thermal neutron SER risk reduction; thermal neutron SER-resilient high-k-metal gate technology; thermal neutron induced singe event upsets; thermal neutron soft error rate; transistor feature size; Error analysis; Logic gates; Neutrons; Process control; Random access memory; Rapid thermal processing; Silicon; W-contact; diborane; embedded SiGe; resistance; soft error rate; thermal neutron;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2014 IEEE International

Conference_Location

Waikoloa, HI

Type

conf

DOI

10.1109/IRPS.2014.6860587

Filename

6860587