Title :
Combining design simulations with nano-probing to root-cause a processor device glitch issue
Author :
Teo, C.W. ; Khatri, Dnyan ; Wei, M.S. ; Lim, S.H.
Author_Institution :
Device Anal. Lab., Adv. Micro Devices (Singapore) Pte Ltd., Singapore, Singapore
fDate :
June 29 2015-July 2 2015
Abstract :
Design simulation is a good method that can be used together with other FA techniques to isolate the root cause of device failures. It is also useful in situations where conventional fault isolation techniques cannot be utilized. This paper presents a case study in which the use of design simulation together with nano-probing is used to successfully identify the root cause of a processor IO glitch failure.
Keywords :
integrated circuit design; microprocessor chips; FA techniques; design simulation; device failures; fault isolation; nano-probing; processor IO glitch failure; processor device glitch; Analytical models; Integrated circuit modeling; MOSFET; Nanoscale devices; Solid modeling;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location :
Hsinchu
DOI :
10.1109/IPFA.2015.7224321
