Characterization and comparison of high-k metal-insulator-metal (MiM) capacitors in 0.13 /spl mu/m Cu BEOL for mixed-mode and RF applications

Author

Tu, Y.L. ; Lin, H.L. ; Chao, L.L. ; Wu, D. ; Tsai, C.S. ; Wang, C. ; Huang, C.F. ; Lin, C.H. ; Sun, J.

Author_Institution

Memory Technol. Div., Taiwan Semicond. Manuf. Corp., Hsin-Chu, Taiwan

fYear

2003

fDate

10-12 June 2003

Firstpage

79

Lastpage

80

Abstract

In this paper, we report high-k MiM capacitors including Ta/sub 2/O/sub 5/, TaO/sub x/N/sub y/, HfO/sub 2/, Al/sub 2/O/sub 3/ and Ta/sub 2/O/sub 5//Al/sub 2/O/sub 3/ stack layer integrated in 0.13 /spl mu/m 8-level Cu-metallization technology using Cu barrier as both top and bottom electrodes. Ta/sub 2/O/sub 5/ exhibits excellent voltage and temperature linearity of capacitance. Al/sub 2/O/sub 3/ shows low leakage, but poor voltage and temperature linearity. Voltage linearity could be significantly affected by high-k deposition temperature. We present high-k MiM capacitors with voltage linearity as low as 25 ppm/V and 13 ppm/V/sup 2/.

Keywords

MIM devices; aluminium compounds; capacitors; copper; hafnium compounds; metallisation; mixed analogue-digital integrated circuits; tantalum compounds; 0.13 micron; Cu; Cu barrier; Cu metallization technology; HfO/sub 2/; MIM capacitors; RF applications; Ta/sub 2/O/sub 5/-Al/sub 2/O/sub 3/; Ta/sub 2/O/sub 5//Al/sub 2/O/sub 3/ stack layer; TaO/sub x/N/sub y/; capacitance; high-k deposition temperature; metal-insulator-metal capacitors; mixed-mode applications; voltage linearity; Electrodes; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Linearity; MIM capacitors; Metal-insulator structures; Radio frequency; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-89114-033-X

Type

conf

DOI

10.1109/VLSIT.2003.1221095

Filename

1221095