Title :
Using cache optimizing compiler for managing software cache on distributed shared memory system
Author :
Nanri, Takeshi ; Sato, Hiroyuki ; Shimasaki, Masaaki
Author_Institution :
Comput. Center, Kyushu Univ., Fukuoka, Japan
fDate :
28 Apr-2 May 1997
Abstract :
On a distributed shared memory (DSM) system, the optimization of memory access is very important for achieving good performance. The authors propose an optimizing compiler which controls a software cache system implemented on a DSM. The software cache consists of a static part related to the compiler and a dynamic part related to cache-managing runtime routines. The compiler controls the static part of the software cache by using information from static analysis. For applications whose behavior can only be dynamically determined, the compiler uses the dynamic part of the software cache. They also propose the application of RISC-oriented optimization techniques to parallel applications on their software cache system. They evaluate the efficiency of the compiler and RISC-oriented optimization techniques on the CM-5 distributed parallel machine. The results show that the compiler and the optimizations considerably improve the performance of basic linear algebra routines: matrix multiplication, Cholesky decomposition and Gaussian elimination
Keywords :
cache storage; distributed memory systems; linear algebra; optimising compilers; parallel machines; reduced instruction set computing; shared memory systems; storage management; system monitoring; CM-5 distributed parallel machine; Cholesky decomposition; Gaussian elimination; RISC-oriented optimization techniques; basic linear algebra routines; cache optimizing compiler; cache-managing runtime routines; compiler efficiency; distributed shared memory system; dynamic part; matrix multiplication; memory access optimization; parallel applications; performance; software cache management; static analysis; static part; Application software; Control systems; Dynamic compiler; Information analysis; Linear algebra; Matrices; Optimizing compilers; Parallel machines; Runtime; Software systems;
Conference_Titel :
High Performance Computing on the Information Superhighway, 1997. HPC Asia '97
Conference_Location :
Seoul
Print_ISBN :
0-8186-7901-8
DOI :
10.1109/HPC.1997.592166