New single-poly EEPROM with cell size down to 8F/sup 2/ for high density embedded nonvolatile memory applications

Author

Kung-Hong Lee ; Ya-Chin King

Author_Institution

Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan

fYear

2003

fDate

10-12 June 2003

Firstpage

93

Lastpage

94

Abstract

A novel EEPROM memory cell with new program and erase operations fabricated by standard CMOS logic process is presented. The cell which consists of two N-Type MOSFET transistors in series is programmed by select gate controlled channel hot hole and erased by channel hot electron injection along with more than 10/sup 5/ cycles of endurance and 1000 hours of data retention at 150/spl deg/C. Without an additional P-well or N-well serving as the coupling gate, the area of a bit can be as small as 8F/sup 2/, the smallest area reported for single-poly EEPROM cells.

Keywords

EPROM; MOSFET; charge injection; 1000 hour; 150 degC; CMOS logic process; channel hot hole electron injection; embedded nonvolatile memory; erase operations; n-type MOSFET transistors; program operation; single-poly EEPROM memory cell; CMOS logic circuits; CMOS process; CMOS technology; Channel hot electron injection; Current measurement; EPROM; Logic devices; MOSFET circuits; Nonvolatile memory; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-89114-033-X

Type

conf

DOI

10.1109/VLSIT.2003.1221102

Filename

1221102