Title :
Compact and fast multiplier using dual array tree structure
Author :
Park, M.C. ; Lee, B.W. ; Kim, G.M. ; Kim, D.H.
Author_Institution :
Samsung Electronic Co.
Keywords :
CMOS process; Circuit topology; Clocks; Digital signal processing; Digital signal processors; Pipelines; Reduced instruction set computing; Tree data structures; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3
