Error-resilient design techniques for reliable and dependable computing

Rising PVT variations at advanced process nodes make it increasingly difficult to meet aggressive performance targets under strict power budgets. Traditional adaptive techniques that compensate for PVT variations require substantial margining to account for local variations and rapid environmental changes. In this paper, we review a technique called Razor that eliminates worst-case safety margins through in situ error detection and correction of variation-induced delay errors. We present silicon measurement results from multiple industrial and academic demonstration systems that using Razor-based dynamic voltage and frequency management. In particular, we highlight the application of Razor to two specific platforms. The first is an ARM-based industrial prototype where Razor-based dynamic adaptation leads to 52% energy savings at 1GHz operation. The second platform applies Razor for robust operation in the presence of radition-induced Single Event Upsets.