Title :
Conventional poly-Si gate MOS-transistors with a novel, ultra-thin Hf-oxide layer
Author :
Kim, Y. ; Lim, C. ; Young, C.D. ; Matthews, K. ; Barnett, J. ; Foran, B. ; Agarwal, A. ; Brown, G.A. ; Bersuker, G. ; Zeitzoff, P. ; Gardner, M. ; Murto, R.W. ; Larson, L. ; Metzner, C. ; Kher, S. ; Huff, H.R.
Author_Institution :
Int. SEMATECH, Santa Clara, CA, USA
Abstract :
Conventional poly-Si gate MOS transistors with a high-k gate-dielectric were fabricated using a novel, ultra-thin Hf-oxide. Various integration effects on the high-k layer were studied such as Si-surface preparation, deposition conditions, and post-deposition anneals, demonstrating EOT of 1.6 to 1.2 nm and excellent gate leakage current. Promising transistor behaviors were obtained including electron mobility up to 90% of SiO/sub 2/ at both peak and high-field.
Keywords :
MOSFET; annealing; dielectric materials; dielectric thin films; electron mobility; elemental semiconductors; hafnium compounds; leakage currents; semiconductor device measurement; silicon; 1.6 to 1.2 nm; Si-HfO/sub 2/; conventional poly-Si gate MOS transistors; electron mobility; equivalent oxide thickness; gate leakage current; high-k gate-dielectric; post-deposition annealing; ultrathin Hf-oxide layer; Annealing; Electron mobility; Gate leakage; High K dielectric materials; High-K gate dielectrics; Leakage current; MOS devices; MOSFETs; Surface treatment; Temperature;
Conference_Titel :
VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-033-X
DOI :
10.1109/VLSIT.2003.1221138
