DocumentCode :
186816
Title :
An LDMOS hot carrier model for circuit reliability simulation
Author :
Sasse, Guido T. ; Claes, Jan A. M. ; de Vries, Bert
Author_Institution :
Integrated Technol. Platform, NXP Semicond., Nijmegen, Netherlands
fYear :
2014
fDate :
1-5 June 2014
Abstract :
In this paper we present a model that can be used to calculate hot carrier degradation in LDMOS devices within a circuit reliability simulation environment. The model is suitable for both nLDMOS and pLDMOS devices. We show experimental evidence on the applicability of this model over a broad range of VGS and VDS biases as well as temperature.
Keywords :
MOSFET; hot carriers; semiconductor device models; semiconductor device reliability; LDMOS hot carrier; circuit reliability simulation; hot carrier degradation; nLDMOS devices; pLDMOS devices; Degradation; Electric fields; Hot carriers; Integrated circuit modeling; Integrated circuit reliability; Stress; LDMOS; Reliability simulation; hot carrier degradation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 2014 IEEE International
Conference_Location :
Waikoloa, HI
Type :
conf
DOI :
10.1109/IRPS.2014.6860674
Filename :
6860674
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=186816
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