DocumentCode
1868165
Title
Full integration and reliability evaluation of phase-change RAM based on 0.24 /spl mu/m-CMOS technologies
Author
Hwang, Y.N. ; Hong, J.S. ; Lee, S.H. ; Ahn, S.J. ; Jeong, G.T. ; Koh, G.H. ; Oh, J.H. ; Kim, H.J. ; Jeong, W.C. ; Lee, S.Y. ; Park, J.H. ; Ryoo, K.C. ; Horii, H. ; Ha, Y.H. ; Yi, J.H. ; Cho, W.Y. ; Kim, Y.T. ; Lee, K.H. ; Joo, S.H. ; Park, S.O. ; Chung, U
Author_Institution
Adv. Technol. Dev., Samsung Electron. Co. Ltd., Kyunggi-Do, South Korea
fYear
2003
fDate
10-12 June 2003
Firstpage
173
Lastpage
174
Abstract
We have fully integrated a nonvolatile random access memory by successfully incorporating a reversibly phase-changeable chalcogenide memory element with MOS transistor. As well as basic characteristics of the memory operation, we have also observed reliable performances of the device on hot temperature operation, endurance against repetitive phase transition, writing imprint, reading disturbance and data retention.
Keywords
CMOS integrated circuits; MOSFET; antimony compounds; chalcogenide glasses; germanium compounds; random-access storage; semiconductor device reliability; tellurium compounds; 0.24 micron; Ge/sub 2/Sb/sub 2/Te/sub 5/; MOS transistor; data retention; fully integrated nonvolatile random access memory; hot temperature operation; phase-change RAM based CMOS; reading disturbance; reliability; repetitive phase transition; reversibly phase-changeable chalcogenide memory element; writing imprint; Amorphous materials; CMOS technology; Crystallization; MOSFETs; Nonvolatile memory; Phase change memory; Phase change random access memory; Plasma confinement; Random access memory; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-033-X
Type
conf
DOI
10.1109/VLSIT.2003.1221141
Filename
1221141
Link To Document