Quantitative analysis of State-of-the-Art synchronizers: Clock domain crossing perspective

Reliable transferring of data from one clock domain to another requires synchronization. Therefore, synchronizers play an important role in clock domain crossing (CDC). But despite their wide applications, there is no standard quantitative metric available to analyze various synchronizer configurations on common grounds. To overcome this limitation, this paper presents a comparison of three basic and widely used synchronizers. Latency and power consumption metric are measured for level, edge-detecting and pulse generating synchronizers. Furthermore, effects of these synchronizers are studied when applied to some commonly used asynchronous handshaking protocols under 90nm CMOS technology.