Static fault localization on Memory failures using Photon Emission Microscopy

Author

Dayanand, N. ; Quah, A.C.T. ; Chen, C.Q. ; Ang, G.B. ; Moon, S. ; Mai, H. P. Ng Z. H. ; Lam, J.

Author_Institution

PTF Dept., GLOBALFOUNDRIES Singapore, Singapore, Singapore

fYear

2015

fDate

June 29 2015-July 2 2015

Firstpage

322

Lastpage

326

Abstract

Conventionally, Static Random Access Memory (SRAM) failures rely on memory bitmap for failure analysis. Static fault localization approach is ineffective except if the defect is large enough to cause a resistive short between the VDD and VSS nodes. However, it was observed that subtle defects that fall in the wordline (WL) of the pass gate transistor results in a partially turned-on NMOS with electroluminescence that can be effectively localized by Photon Emission Microscopy (PEM). In this paper, we leverage on this phenomenon to showcase 4 cases where static fault localization using PEM has helped the foundry to resolve memory BIST yield loss on advanced technology node devices without bitmap capability.

Keywords

MOS integrated circuits; SRAM chips; built-in self test; electroluminescence; failure analysis; integrated circuit yield; logic testing; BIST yield loss; NMOS; SRAM; VDD; VSS; electroluminescence; failure analysis; memory bitmap; memory failures; pass gate transistor; photon emission microscopy; static fault localization; static random access memory; Failure analysis; Logic gates; Metals; Microscopy; Photonics; Random access memory; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the

Conference_Location

Hsinchu

Type

conf

DOI

10.1109/IPFA.2015.7224389

Filename

7224389