Title :
3 Gbps, 5000 ppm spread spectrum SerDes PHY with frequency tracking phase interpolator for serial ATA
Author :
Aoyama, Masahito ; Ogasawara, Kuniaki ; Sugawara, Mariko ; Ishibashi, Takayuki ; Ishibashi, Takayuki ; Shimoyama, S. ; Yamaguchi, Kazuhiro ; Yanagita, T. ; Noma, T.
Author_Institution :
NEC Electron. Corp., Kawasaki, Japan
Abstract :
We have developed a 5000 ppm spread spectrum Serializer/Deserializer (SerDes) physical layer (PHY) chip compliant with Serial AT Attachment (ATA). The chip was fabricated with a 0.15 /spl mu/m 1.5 V CMOS process and includes a self-running spread spectrum carrier generator to provide both transmit and receive block, a self-running phase interpolator to recover the +/-5000 ppm spread spectrum receive (RX) clock and data.
Keywords :
CMOS integrated circuits; phase locked loops; spread spectrum communication; 1.5 V; 3 Gbit/s; CMOS; receive block; self-running spread spectrum carrier generator; serial AT attachment; spectrum deserializer physical layer chip; spectrum receive clock; spectrum serializer physical layer chip; tracking phase interpolator; transmit block; CMOS process; Clocks; Counting circuits; Frequency modulation; Microcomputers; National electric code; Phase locked loops; Physical layer; Signal generators; Spread spectrum communication;
Conference_Titel :
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-034-8
DOI :
10.1109/VLSIC.2003.1221175
