Cu concentration from backside contamination induced STI crack after High Temperature Stress

This study presents integrated circuit failure analysis (FA) results of reliability fail devices with high pin leakage (UHAST-“Unbiased Highly Accelerated Stress Test” and HTS-“High Temperature Storage”). FA reveals a crack along the STI (shallow trench isolation) sidewall and into Si crystallographic plane. Copper (Cu) was found by EDX analysis underneath Ni silicide layer and migrated into silicon STI edge. One main observation was that the Cu crack occurred systematically on a small active area (p-sub) defined as p-well with minimum design rule distance to n-well active area. The source of Cu is investigated in a series of DOE (design of experiments). The article will discuss different hypothesis of Cu contamination during front-end manufacturing and assembly process. A model including layout sensitivity and the thermal stress effect during HTS/UHAST has been provided.