Title :
Effects of the initial stress at the bottom of open TSVs
Author :
Papaleo, Santo ; Zisser, Wolfhard H. ; Ceric, Hajdin
Author_Institution :
Christian Doppler Lab. for Reliability Issues in Microelectron., Tech. Univ. Wien, Vienna, Austria
fDate :
June 29 2015-July 2 2015
Abstract :
In this work we have studied delamination in Open Through Silicon Vias structures under different initial stress loads. The study has been carried out by means of simulation which is based on the evaluation of the J integral for different interfaces. Our simulations enabled us to determine the structures with the lowest failure probability.
Keywords :
delamination; integrated circuit interconnections; integrated circuit reliability; three-dimensional integrated circuits; delamination; failure probability; open TSV; open through silicon vias; Delamination; Residual stresses; Silicon; Strain; Through-silicon vias; Tin;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location :
Hsinchu
DOI :
10.1109/IPFA.2015.7224429
