Thermal limitations due to semiconductors and packaging in high power switches

Performance of high power switches under high stress conditions is limited by thermal effects. Thermal failure of semiconductors and packaging limits the safe operating area (SOA) of the device. This paper reports extensive characterization of semiconductors and packaging, and its influence on device failure in high stress conditions. It is shown that due to non-uniformity of temperature distribution within the semiconductor under stress conditions, it is not adequate to simply consider overall power loss during thermal modeling of the device. Non-uniform thermal gradient due to specific device geometry must be taken into account during such modeling efforts