DocumentCode :
1870103
Title :
A 40-GHz frequency divider in 0.18-/spl mu/m CMOS technology
Author :
Jri Lee ; Razavi, B.
Author_Institution :
Electr. Eng. Dept., California Univ., Los Angeles, CA, USA
fYear :
2003
fDate :
12-14 June 2003
Firstpage :
259
Lastpage :
262
Abstract :
A frequency divider employs resonance techniques by means of on-chip spiral inductors to operate at high speeds. Configured as two cascaded /spl divide/2 stages, the circuit achieves a frequency range of 2.3 GHz at 40 GHz while consuming 31 mW from a 2.5-V supply.
Keywords :
CMOS analogue integrated circuits; frequency dividers; 0.18 micron; 2.3 GHz; 2.5 V; 31 mW; 40 GHz; CMOS; chip spiral inductors; frequency divider; CMOS technology; Circuit topology; Filters; Frequency conversion; Inductors; Parasitic capacitance; RLC circuits; Radio frequency; Spirals; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-034-8
Type :
conf
DOI :
10.1109/VLSIC.2003.1221221
Filename :
1221221
Link To Document :
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