DocumentCode
1870310
Title
The FA approaching and designed solution to the hidden PID killer
Author
XuBo Chen ; Gang Qian ; LiLung Lai ; SoonFatt Ng
Author_Institution
Semicond. Manuf. Int. (Shanghai) Corp., Shanghai, China
fYear
2015
fDate
June 29 2015-July 2 2015
Firstpage
524
Lastpage
526
Abstract
Plasma Induced Damage (PID) was identified as the killer on one 0.18um product during the yield ramp-up. FA process started at the electrical analysis and then went through physical approaches for evidences. Finally, we got the solution from both design/layout and quality gating.
Keywords
failure analysis; integrated circuit yield; FA process; electrical analysis; failure analysis; hidden PID killer; plasma induced damage; quality gating; size 0.18 mum; yield ramp-up; CMOS integrated circuits; Layout; Leakage currents; Logic gates; Manufacturing; Metals; Plasmas;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location
Hsinchu
Type
conf
DOI
10.1109/IPFA.2015.7224449
Filename
7224449
Link To Document