Design and verification of integrated inductors in CMOS

Author

Molavi, Reza ; Mirabbasi, Shahriar ; Djahanshahi, H.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada

fYear

2012

fDate

April 29 2012-May 2 2012

Firstpage

1

Lastpage

4

Abstract

The design and verification of several monolithic inductor structures is presented. Based on the measurement results of proof-of-concept prototypes in 65 nm CMOS, the inductance (L) and quality factor (Q) of these structures are analyzed both qualitatively and quantitatively. Also, a closed-form approximation for the inductance of vertical spirals is presented and the results are applied to design a compact inductor for serie-speaking at the input of an impedance-matched amplifier.

Keywords

CMOS integrated circuits; amplifiers; approximation theory; inductors; integrated circuit design; monolithic integrated circuits; CMOS; closed-form approximation; compact inductor; impedance-matched amplifier; inductance; integrated inductor design; integrated inductor verification; monolithic inductor structure; proof-of-concept prototype; quality factor; size 65 nm; vertical spiral; CMOS integrated circuits; Inductance; Inductors; Metals; Q factor; Resistance; Spirals; CMOS integrated inductors; Monolithic inductors; inductor verification; series peaking;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical & Computer Engineering (CCECE), 2012 25th IEEE Canadian Conference on

Conference_Location

Montreal, QC

ISSN

0840-7789

Print_ISBN

978-1-4673-1431-2

Electronic_ISBN

0840-7789

Type

conf

DOI

10.1109/CCECE.2012.6335019

Filename

6335019