DocumentCode :
1870906
Title :
A new high level testability measure: description and evaluation
Author :
Gentil, M.-H. ; Crestani, D. ; El Rhalibi, A. ; Durante, C.
Author_Institution :
Lab. d´´Inf., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
fYear :
1994
fDate :
25-28 Apr 1994
Firstpage :
421
Lastpage :
426
Abstract :
A high testability measure based on constraints propagation and dedicated to deterministic test of the combinational part of scannable circuits is compared to three others high level testability measures of the literature. This measure is used to guide hierarchical generation of test vectors and automatic test point insertion
Keywords :
combinatorial circuits; constraint handling; controllability; logic testing; observability; automatic test point insertion; combinational part; constraints propagation; deterministic test; hierarchical generation; high level testability measure; scannable circuits; test vectors; Art; Automatic testing; Calculus; Circuit faults; Circuit testing; Controllability; DH-HEMTs; Logic circuits; Logic testing; Robots;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
Type :
conf
DOI :
10.1109/VTEST.1994.292279
Filename :
292279
Link To Document :
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