Title :
Functional design verification for the PowerPC 601 microprocessor
Author :
Glenn, Scott ; Meil, Gavin ; Rodriguez, Ed ; Brooks, Jeff
Author_Institution :
Int. Business Machines Corp., Austin, TX, USA
Abstract :
The PowerPC 601 microprocessor, in its goal to establish the PowerPC architecture in the marketplace, had to meet an aggressive 12-month development schedule, be sufficiently functional upon first-pass silicon for system and software development, and quickly achieve volume shipment quality. Accomplishing these goals required comprehensive functional verification methodologies
Keywords :
circuit analysis computing; computer testing; integrated circuit testing; logic CAD; microprocessor chips; virtual machines; Judge system emulation board; PowerPC 601; PowerPC architecture; development schedule; functional design verification; hardware verification methodology; microprocessor; volume shipment quality; Analytical models; DSL; Hardware; Logic design; Microprocessors; Power system modeling; Scheduling; Silicon; Testing; Virtual manufacturing;
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
DOI :
10.1109/VTEST.1994.292292
