Microprocessor design verification by two-phase evolution of variable length tests

Author

Smith, J.E. ; Bartley, M. ; Fogarty, T.C.

Author_Institution

Fac. of Comput. Studies & Math., Univ. of the West of England, Bristol, UK

fYear

1997

fDate

13-16 Apr 1997

Firstpage

453

Lastpage

458

Abstract

This paper discusses the use of a genetic algorithm to generate test programs for the verification of the design of a modern microprocessor. The algorithm directly learns sequences of assembly-code instructions which satisfy a coverage metric for one specific part of a design. The complexity of the design is such that it is not simple to predict in advance the length of the program needed to achieve coverage, and there is a severe time penalty for evaluating long tests. This has led to the development of a genetic algorithm which uses a two phase mechanism for variation in string length, through maintenance of a diverse population with varying lengths coupled with a “meta-algorithm” for periodic larger increases

Keywords

assembly language; automatic test software; circuit CAD; circuit optimisation; computer testing; formal verification; genetic algorithms; instruction sets; integrated circuit testing; microprocessor chips; assembly-code instructions; coverage metric; design complexity; genetic algorithm; meta-algorithm; microprocessor design verification; string length; test program generation; time penalty; two-phase evolution; variable length tests; Algorithm design and analysis; Computer science; Distributed control; Genetic algorithms; Logic design; Mathematics; Microelectronics; Microprocessors; Stress; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Evolutionary Computation, 1997., IEEE International Conference on

Conference_Location

Indianapolis, IN

Print_ISBN

0-7803-3949-5

Type

conf

DOI

10.1109/ICEC.1997.592354

Filename

592354