Title :
An 8-bit slice GaAs bus logic LSI for a high-speed parallel processing system
Author :
Kameyama, A. ; Kawakyu, K. ; Sasaki, T. ; Seshita, T. ; Terada, T. ; Kitaura, Y. ; Toyoda, N. ; Maeda, A.
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
An 8-b slice GaAs bus logic (BL) LSI for a high-speed parallel processing system has been designed with a standard-cell approach, fabricated by a 0.8- mu m WN/sub x/ gate LDD MESFET process, and confirmed to be fully functional. The BL consists of 3376 logic-gates and a 76-b dual-port register file (RF) in a 7-mm*7-mm chip. A 10-ns cycle time has been achieved with a power dissipation of 7 W. By constructing a data transfer network with 48 GaAs BLs, it is possible to realize a data transfer rate of 4 Gb/s (32 b*120 Mcycle/s).<>
Keywords :
III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated logic circuits; large scale integration; parallel processing; 0.8 micron; 10 ns; 4 Gbit/s; 7 W; 8 bit; 8-bit slice; GaAs; LDD MESFET process; WN/sub x/ gate; bus logic LSI; data transfer network; dual-port register file; high speed processing; lightly doped drain; parallel processing system; power dissipation; standard-cell approach; Circuit testing; Gallium arsenide; Large scale integration; Logic design; Logic testing; Parallel processing; Power dissipation; Radio frequency; Registers; Ultra large scale integration;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1989. Technical Digest 1989., 11th Annual
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/GAAS.1989.69304
