FPGA-based matrix inversion using an iterative Chebyshev-type method in the context of compressed sensing

Compressed sensing is a recently proposed technique aiming to acquire a signal with sparse or compressible representation in some domain, using a number of samples under the limit established by the Nyquist theorem. The challenge is to recover the sensed signal solving an underdetermined linear system. Several techniques can be used for that purpose, such as l1 minimization, Greedy and combinatorial algorithms. Greedy algorithms have been found to be more suitable in hardware solutions, however they rely on efficient matrix inversion techniques in order to solve the underdetermined linear systems involved. In this paper, a novel and efficient FPGA architecture to find a matrix inversion is presented. The architecture is based on an iterative Chebyshev-type method, and it was developed in a Xilinx Spartan-6 XC6SLX45 FPGA. Preliminary results show a high accuracy with an error of 0.0001 in average.