DocumentCode :
1871945
Title :
Construction of an optoelectronic bitonic sorter based on CMOS/InGaAs smart pixel technology
Author :
Walker, A.C. ; Desmulliez, M.P.Y. ; Tooley, F.A.P. ; Neilson, D.T. ; Dines, J.A.B. ; Baillie, D.A. ; Prince, S.M. ; Wilkinson, L.C. ; Taghizadeh, M.R. ; Blair, P. ; Snowdon, J.F. ; Wherrett, B.S. ; Stanley, C. ; Pottier, F. ; Underwood, I. ; Vass, D.G. ;
Author_Institution :
Dept. of Phys., Heriot-Watt Univ., Edinburgh, UK
fYear :
1995
fDate :
23-24 Oct 1995
Firstpage :
180
Lastpage :
187
Abstract :
The Scottish Collaborative Initiative in Optoelectronic Sciences (SCIOS) is developing an optoelectronic parallel sorter using CMOS/InGaAs hybrid technology. We describe the design of a system with the potential of sorting 1024 8-bit words in 10 μs. The system is based on 32-by-32 arrays of smart pixels produced by solder-assembly of strained InGaAs/GaAs MQW modulator/detectors with CMOS electronics. These devices are linked by an optical perfect shuffle interconnect. The functionality of each processing node, as required by the algorithm, is selected by optical control signals which are circulated along with the optical data. Various physical constraints, including optics limitations, laser power requirements and heat dissipation, have been investigated
Keywords :
integrated optoelectronics; optical logic; smart pixels; sorting; InGaAs-GaAs; InGaAs/GaAs; bitonic sorter; hybrid technology; optical perfect shuffle interconnect; optoelectronic; smart pixel technology; CMOS technology; Collaboration; Gallium arsenide; Indium gallium arsenide; Optical interconnections; Optical modulation; Quantum well devices; Sensor arrays; Smart pixels; Sorting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Massively Parallel Processing Using Optical Interconnections, 1995., Proceedings of the Second International Conference on
Conference_Location :
San Antonio, TX
Print_ISBN :
0-8186-7101-7
Type :
conf
DOI :
10.1109/MPPOI.1995.528642
Filename :
528642
Link To Document :
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